Unal, Burak2025-10-202025-10-202025979833156656297983315665552165-0608https://doi.org/10.1109/SIU66497.2025.11112140Low Density Parity Check (LDPC) codes have gained popularity in communication systems due to their capacity-approaching error correction performance. In this study, a highperformance LDPC decoding algorithm with extremely low resource usage is proposed. Among the hard decision class of LDPC decoders, Gallager B (GaB) provides high-performance hardware due to its computational simplicity. However, GaB suffers from poor error-correction performance. In this study, a new intrinsic computation technique for GaB called Intrinsic Gallager B (IGaB) is introduced to improve error correction performance. Our simulation results show that the IGaB algorithm provides better error correction performance compared with GaB. GaB and IGaB algorithms are implemented on Field Programmable Gate Array (FPGA) to compare hardware performance.trinfo:eu-repo/semantics/closedAccessLDPC DecodersFPGAHigh-Performance ArchitecturesConference Object10.1109/SIU66497.2025.111121402-s2.0-105015456044